ARUSH SINGH; AKASH SAXENA; BHARAT GAUR. A Review on Optimizing Cache Memory Performance. Journal of Electronic Design Engineering, [S. l.], v. 8, n. 1, p. 18–23, 2022. Disponível em: http://matjournals.co.in/index.php/JOEDE/article/view/426. Acesso em: 10 apr. 2025.