Verilog-A Implementation of SOI MOSFET-Based Amplifier and Ring Oscillator Circuits

Abstract

In this work, a single-stage CMOS amplifier circuit and a three-stage CMOS ring oscillator circuit based on silicon-on-insulator-MOSFET (SOI MOSFET) have been implemented in the Cadence environment. In doing so, Verilog-A models of the long-channel (10 µm) SOI-MOSFET (for both NMOS and PMOS) have been utilized because of the unavailability of built-in models for such MOSFETs in the Cadence tools suite. To compare the performance of SOI-MOSFET-based circuits with the bulk-MOSFET ones, Verilog-A models for the bulk-MOSFETs are also utilized for a 10 µm long channel. Curve tracer circuits based on both SOI and bulk-MOSFETs have been implemented to compare the output characteristics and the transfer characteristics curves. Simulation results reveal that SOI-MOSFET demonstrates higher ON current than the bulk MOSFET and these effects are more dominant when the channel length is varied. Simulation results also show that SOI-based CMOS amplifier has higher gain than their bulk-based counterparts. The Cadence simulation also reveals that the three-stage ring oscillator based on SOI MOSFET has a higher number of cycles than the bulk-based one for the same time duration. Therefore, the SOI MOSFET-based circuits demonstrate superior performance over the bulk MOS-based circuits, which is due to the SOI MOSFET's better gate control and improved speed over the bulk ones.