DHARANI S; ASUVANTI MA. D Flip Flop Using AVLG Technique with Static Body Biasing Using Cadence Virtuoso Tool. Journal of Electronic Design Engineering, [S. l.], v. 5, n. 3, p. 16–21, 2019. Disponível em: https://matjournals.co.in/index.php/JOEDE/article/view/6720. Acesso em: 21 oct. 2025.