Dharani S, and Asuvanti MA. “D Flip Flop Using AVLG Technique With Static Body Biasing Using Cadence Virtuoso Tool”. Journal of Electronic Design Engineering 5, no. 3 (October 12, 2019): 16–21. Accessed October 21, 2025. https://matjournals.co.in/index.php/JOEDE/article/view/6720.