Resource Scheduling in High Level Synthesis of Digital Filter using Differential Evolution Algorithm

Abstract

In this project, the process of high-level synthesis (HLS) with scheduling, involves the
assignment of the DFG operations to various time-steps. DFG operations to physical
arithmetic functional units (adders, multipliers, etc.), as well as the subsequent allocation of
hardware resources (registers, multiplexors, etc.) to facilitate the data transfer in the DFG.
Differential Evolution has been shown to be a simple yet efficient optimization approach in
solving a variety of benchmark problems as well as many real-world applications. Differential
evolution (DE) together with evolution strategies (ES’s) and evolutionary programing (EP)
can be categorized into a class of population-based, Derivative free methods known as
Evolutionary algorithm. In this project the resource scheduling in high level synthesis with
differential evolution algorithm the number of functional units (adders, multipliers, etc.), as
well as the subsequent allocation of hardware resources (registers, multiplexors, etc.) are
reduced with the result of area , power and delay reduced with effective cost reduction.