Vol. 1 No. 2 (2016)

Articles

• Resource Allocation Of Digital Filter In High Level Synthesis Using Particle Swarm Optimization Algorithm

  Kavya T D, Shilpa K C

  33-38

  • Requires Subscription pdf

• Resource Scheduling in High Level Synthesis of Digital Filter using Differential Evolution Algorithm

  Atul Jadhav, Shilpa. K. C

  13-22

  • Requires Subscription pdf

• Monopulse Radar Target Distinction And Its Implementation On FPGA

  Anuradha C, Ramesha K, Deepak B V N

  39-53

  • Requires Subscription pdf

• A New Approach for DSRC Architecture for Vehicular Safety and Non Safety Applications

  Basava Sandesh B.N, Jayaramaiah G.V, Srinadh Dornala

  23-32

  • Requires Subscription pdf

• The MATLAB Simulation and the Experimental Prototype Model are Developed and Tested with Unity and a Lagging Power Factor Loads

  Dr. Anurag Rana

  1-12

  • Requires Subscription pdf